1. Field of the Invention
The invention relates to a semiconductor device in which an element isolating region is formed using LOCOS (LOCal Oxidation of Silicon) and a method for manufacturing the same.
The present application claims priority of Japanese Patent Application No.2000-236213 filed on Aug. 3, 2000, which is hereby incorporated by reference.
2. Description of the Related Art
An LSI (Large Scale Integration) known as a representative of semiconductor devices includes desired circuit devices formed in each of a plurality of element regions which is dielectrically isolated from each other by an element isolating region on a semiconductor substrate. This element isolating region has conventionally been formed using LOCOS.
FIGS. 5A to 5C are flow diagrams for schematically showing an element isolating region forming method utilizing a LOCOS method.
As shown in FIG. 5A, first a silicon oxide (SiO2) film 52 is formed as a pad insulating film by thermal oxidation and then a silicon nitride (SiN) film 53 is formed as an oxidation preventing film by CVD (Chemical Vapor Deposition) on a silicon substrate 51. In this configuration, oxidation preventing film, silicon oxide film 52, is used as a buffer film to prevent a crystal defect from occurring in a surface of the silicon substrate 51 if the silicon nitride film 53 is formed directly formed on the silicon substrate 51. Next, by photolithography, the silicon nitride film 53 is selectively etched away only in an element-isolating region formation-expected region 54 on the silicon substrate 51 to thereby expose the silicon oxide film 52.
Next, as shown in FIG. 5B, by performing thermal oxidation (field oxidation) on the silicon substrate 51 in an oxidizing atmosphere, a field silicon oxide film (field oxide film 55) is formed at such a position in the element-isolating region formation-expected region 54 that is not masked by the silicon nitride film 53. As a result, an element isolating region is formed which is made up of the field oxide film 55. Also, the field oxide film 55 has a so-called bird""s beak 55A formed at its sides. Next, as shown in FIG. 5C, by removing the silicon nitride film 53 and the silicon oxide film 52, the silicon substrate 51 has, formed thereon, a plurality of element regions 56 which is dielectrically isolated from each other by the element isolating region made up of the field oxide film 55.
Afterwards, thus obtained silicon substrate 51 undergoes repeatedly such required process steps as impurity introduction and etching, so that desired circuit elements are formed in the element regions 56, thus completing a semiconductor device.
As mentioned above, the field oxide film 55 formed by LOCOS has the bird""s beak 55A at its sides, which bird""s beak 55A bites into the element region 56. Since a depth by which the bird""s beak 55A bites into the element region 56 is roughly proportional to film thickness of the field oxide film 55, if the field oxide film 55 is formed thick to increase isolation dielectric strength of a circuit element formed in the element region 56, bite-in depth of the bird""s beak 55A is also increased. As a result, a lateral dimension L of the element region 56 is decreased and will be more and more restricted as the LSIs will be demanded to have an even higher integration density in the future, thus leading to a major problem.
If the field oxide film 55 is formed thin to decrease the bite depth of the bird""s beak 55A, on the other hand, the isolation dielectric strength is also decreased, thus finding difficulty in application to such a circuit element that requires a higher isolation dielectric strength. Thus, with the conventional element isolating region forming method using a LOCOS step only once, the bird""s beak 55A cannot avoid biting deeply into the element region 56 particularly, when the element isolating region is formed rather thick.
Also, as the bird""s beak 55A bites into the element region 56 deeper, it becomes more difficult to flatten the surface of the element region 56, so that when a MOS (Metal Oxide Semiconductor) transistor is formed as the circuit element in the element region 56, a channel region is not flattened in shape, thus resulting in fluctuations in effective lateral dimension L, hence in transistor characteristics.
It should be noted that such a semiconductor LSI device including a flash memory, for example, is widely used in information equipment or a like that includes a first type of circuit element that requires a higher isolation dielectric strength (supply voltage: 15-18V) like a memory transistor and a second type of circuit element that requires only a lower isolation dielectric strength (supply voltage: 2.5-3.3V) like a logic transistor in a peripheral circuit which are mixed on the same substrate. In such a configuration, the first type of circuit element requires a thicker element isolating region and the second type of circuit element, only a thinner one.
In manufacturing of such a semiconductor device, however, performing the LOCOS step only once is not sufficient to form an element isolating region that meets requirements of both types of circuit elements described above.
In view of the above, such a semiconductor device manufacturing method has conventionally been provided that forms an element isolating region by performing the LOCOS processing in two steps. The following will describe this semiconductor device manufacturing method along its steps with reference to FIGS. 6A to 6H. Description is made with reference to the above-mentioned example where the first type of circuit element requiring a thicker element isolating region and the second type of circuit element requiring only a thinner element isolating region are formed in a mixed manner on the same substrate.
First, as shown in FIG. 6A, on a silicon substrate 61 is formed by thermal oxidation, a silicon oxide film 62 as the pad insulating film with a film thickness of 18-22 nm, on which is then formed by CVD a silicon nitride film 63 as the oxidation preventing film with a film thickness of 130-170 nm. And, on the silicon substrate 61 are defined a first element-isolating region formation-expected region 64A for a first circuit element requiring a thicker element isolating region and a second element-isolating region formation-expected region 64B for a second circuit element requiring only a thinner element isolating region.
Next, as shown in FIG. 6B, a photo-resist is applied by photolithography everywhere on the silicon substrate 61, which is then exposed and developed to form a photo-resist (PR) film 66 having such a pattern that has an opening 66A therein with a width dimension of 700-750 nm only on the above-mentioned first element-isolating region formation-expected region 64A. Next, as shown in FIG. 6C, the silicon nitride film 63 and the silicon oxide film 62 which are exposed are sequentially and selectively dry-etched and patterned using the photo-resist film 66 as a mask to thereby form an opening 67 with roughly a same dimension as the opening 66A, thus exposing the silicon substrate 61. Subsequently, the silicon substrate 61 is selectively dry-etched on its surface to thereby form a recess 68 with roughly a same width dimension of 700-750 nm as the opening 67 and a depth of 70-80 nm. Next, the photo-resist film 66 is removed.
Next, as shown in FIG. 6D, the silicon substrate 61 is heat treated, as exposed in an oxidizing atmosphere, at 1000-1100xc2x0 C. for 20-30 minutes as first field oxidation (thermal oxidation). This permits the silicon nitride film 63 having the opening 67 therein to be used as a mask to thereby form a first field oxide film 69 having a film thickness of 270-350 nm and a width of 1.0-1.3 xcexcm constituting part of the first element isolating region on the surface of the silicon substrate 61 in which the recess 68 of the first element-isolating region formation-expected region 64A is formed. This first field oxide film 69 has a bird""s beak 69A formed at its sides. When this first field is being formed, the second element-isolating region formation-expected region 64B is covered with the silicon nitride film 63, so that no field oxide film is formed. Note here that the silicon oxide film 62 is integrated with the first field oxide film 69.
Next, as shown in FIG. 6E, a photo-resist is applied by photolithography everywhere on the silicon substrate 61, which is then exposed and developed to thereby form a photo-resist film 71 having such a pattern that has an opening 71A with a width dimension of 330-390 nm only on the above-mentioned second element-isolating region formation-expected region 64B. Next, as shown in FIG. 6F, the exposed silicon nitride film 63 and the silicon oxide film 62 are selectively dry-etched and patterned in this order using the photo-resist film 71 as a mask to thereby form an opening 72 with roughly a same dimension as the opening 71A, thus exposing the silicon substrate 61. Subsequently, the surface of the silicon substrate 61 is selectively dry-etched to form a recess 73 having roughly a same width dimension of 330-390 nm as the opening 72 and a depth of 70-80 nm. Next, the photo-resist film 71 is removed.
Next, as shown in FIG. 6G, the silicon substrate 61 is heat treated, as exposed in an oxidizing atmosphere, at 1000-1100xc2x0 C. for 30-40 minutes as second field oxidation (thermal oxidation). This permits the silicon nitride film 63 having the opening 67 therein to be used as a mask to thereby form a second field oxide film 74 with a film thickness of 450-500 nm so as to overlap with the first field oxide film 69 in the first element-isolating region formation-expected region 64A. As a result, in the first element-isolating region formation-expected region 64A is formed a first element isolating region 76 comprised of the first field oxide film 69 and the second field oxide film 74. At the same time, using as a mask the silicon nitride film 63 having the opening 72 therein, a third field oxide film 75 having a film thickness of 330-380 nm and a width of 0.6-0.8 xcexcm is formed on the surface of the silicon substrate 61 in the recess 73 of the second element-isolating region formation-expected region 64B. This third field oxide film 75 provides a second element isolating region 78 and also has a bird""s beak 75A at its sides.
Next, as shown in FIG. 6H, the silicon oxide film 62 and the silicon nitride film 63 are removed to thereby form such a silicon substrate 61 that has, formed thereon, a plurality of first element isolating regions dielectrically isolated from each other by the first element isolating region 76 made up of the first field oxide film (thin film) 69 and the second field oxide film (thick film) 74 and a plurality of second element regions 79 dielectrically isolated from each other by the second element isolating region 78 made up of the third field oxide film (thick film) 75.
The above-mentioned semiconductor device manufacturing method forms the element isolating region using LOCOS in two steps and so can form the first element isolating region 76 and the second element isolating region 78 that respectively meet the requirements of the first circuit element requiring a thicker element isolating region and the second circuit element only requiring a thinner element isolating region.
By this semiconductor device manufacturing method, however, when forming the first element isolating region 76 requiring an especially thick element isolating region, the silicon nitride film 63 having the opening 67 therein is used as a mask commonly for the first field oxidation shown in FIG. 6D for forming the first field oxide film (thin film) 69 and the second field oxidation shown in FIG. 6G for forming the second field oxide film (thick film) 74, so that the first and second field oxide films 69 and 74 spread laterally by almost the same width. Therefore, both bird""s beaks 69A and 74A inevitably bite deep into a first element region 77.
The semiconductor device manufacturing method for forming the element isolating region using LOCOS in two steps is disclosed, for example, in Laid-open Japanese Patent Application No. Hei 9-330922. By this semiconductor device manufacturing method, as shown in FIG. 7A, first a pad oxide film 82 and a nitride film 83 are patterned and formed on a semiconductor substrate 81 and then, using the nitride film 83 as a mask, a first thermal oxidation is performed to form a thicker first field oxide film 84. Next, as shown in FIG. 7B, the nitride film 83 is etched using, for example, phosphoric acid to remove the pad oxide film 82 using, for example, BOE (Buffered Oxide Etchant) in order to reduce a size of both films 83 and 82, thus exposing the semiconductor substrate 81. Next, as shown in FIG. 7C, a second thermal oxidation is performed using thus small-sized nitride film 83 as a mask to thereby form a thinner second field oxide film 85 on the above-mentioned exposed surface. Next, as shown in FIG. 7D, the nitride film 83 and the pad oxide film 82 are removed to thereby obtain such the semiconductor substrate 81 that has, formed thereon, a plurality of element regions 86 dielectrically isolated from each other by an element isolating region made up of the thicker first field oxide film 84 and the thinner second field oxide film 85.
Another semiconductor device manufacturing method for likewise forming the element isolating region using LOCOS in two steps is disclosed, for example, in Japanese Laid-open Patent Application No. Hei9-330923.
By this semiconductor device manufacturing method, which employs a so-called fully recessed LOCOS method, as shown in FIG. 8A, first on a semiconductor substrate 91 is formed by patterning an oxidation preventing film pattern 93 which has therein an opening T2 formed by a pad oxide film 92 and a nitride film, which oxidation preventing film pattern 93 is then used as a mask to perform a first thermal oxidation to thereby form a first field oxide film 94 on the semiconductor substrate 91 at a lower part of the pad oxide film 92 exposed through the opening T2. At sides of this first field oxide film 94 is formed a bird""s beak 94A. Next, as shown in FIG. 8B, on a side wall of the oxidation preventing film pattern 93 is formed a spacer 95 made of a nitride film. And then, by using both oxidation preventing film pattern 93 and spacer 95 as a mask, in the first field oxide film 94 is formed a recess 96 which is shallower than thickness of the first field oxide film 94 as shown in FIG. 8C. Alternatively, this recess 96 may well be formed throughout on all thicknesses of the first field oxide film 94.
Next, as shown in FIG. 8D, a second thermal oxidation is performed using the oxidation preventing film pattern 93 and the spacer 95 to oxidize the first field oxide film 94 having the recess 96 formed therein in order to form a second field oxide film 97 thicker than the first field oxide film 94 at a position corresponding to an opening in the spacer 95. Next, as shown in FIG. 8E, the pad oxide film 92 and the oxidation preventing film pattern 93 are removed to obtain such the semiconductor substrate 91 that has, formed thereon, a plurality of element regions 98 dielectrically isolated from each other by an element isolating region made up of the thinner first field oxide film 94 and the thicker second field oxide film 97.
By the above-mentioned semiconductor device manufacturing method, especially, the spacer 95, which is formed on the side wall of the oxidation preventing film pattern 93, can suppress bite-in of the bird""s beak 94A when the second field oxide film 97 is formed by the second thermal oxidation, thus preventing the bird""s beak 94A from biting deep into the element region 98.
Also, still another semiconductor device manufacturing method forming the element isolating region using LOCOS in two steps is disclosed, for example, in Japanese Laid-open Patent Application No. Hei 10-284477.
By this semiconductor device manufacturing method, as shown in FIG. 9A, first on a semiconductor substrate 101 is formed by patterning a nitride film 103 having a pad oxide film 102 and an opening 103A, which nitride film 103 is then used as a mask to perform a first thermal oxidation to form a first field oxide film 104 on the semiconductor substrate 101 at a lower part of the pad oxide film 102 exposed through the opening 103A. Next, as shown in FIG. 9B, for example, RIE (Reactive In Etching) is performed using the nitride film 103 having the opening 103A therein as a mask to selectively etch the first field oxide film 104, thus forming an opening 105 penetrating through the first field oxide film 104. Alternatively, this opening 105 may not penetrate through the first field oxide film 104, thus forming a remaining film.
Next, as shown in FIG. 9C, a second thermal oxidation is performed using the nitride film 103 having the opening 103A therein as a mask to thereby oxidize the first field oxide film 104 having the opening 105 formed therein, thus forming a second field oxide film 106. Next, as shown in FIG. 9D, the nitride film 103 is removed to thereby obtain such the semiconductor substrate 101 that has, formed thereon, a plurality of element regions 108 dielectrically isolated from each other by an element isolating region made up of the first field oxide film 104 and the second field oxide film 106. By this semiconductor device manufacturing method, it is possible to form a thick element isolating region made up of the first field oxide film 104 and the second field oxide film 106, thus maintaining sufficiently good isolation between the element regions even with a small distance between the element isolating regions.
The prior art semiconductor device manufacturing methods disclosed in the above two publications for forming the element isolating region using LOCOS in two steps have such respective problems as follows.
First, by the semiconductor device manufacturing method disclosed in Japanese Laid-open Patent Application No. Hei 9-330922, as shown in FIGS. 7A to 7D, the nitride film 83 used as an oxidation preventing mask when forming the first field oxide film 84 is reduced in size by wet etching after the first field oxide film 84 is formed to thereby reserve the exposed surface of the semiconductor substrate 81, on which the second field oxide film 85 is then formed, so that the element isolating region has a width as much as the first field oxide film 84 plus the second field oxide film 85. Therefore, an inside region of the first field oxide film 84 which can be used as the element region 86 originally is occupied by the second field oxide film 85, thus resulting in a disadvantage of reduced lateral dimension of the element region 86.
By the next semiconductor device manufacturing method disclosed in Japanese Laid-open Patent Application No. Hei 9-330923, as shown in FIGS. 8A to 8E, the fully recessed LOCOS method is applied in a premise, so that the spacer 95 made of a nitride film is formed on the side wall of the oxidation preventing film pattern 93 used when forming the first field oxide film 94 prior to the second thermal oxidation. Then, this spacer 95 is used as part of the oxidation preventing film in the second thermal oxidation to thereby form the second field oxide film 97. To thus form the spacer 95 made of the nitride film on the side wall of the oxidation preventing film pattern 93, however, prior to the formation of the second field oxide film 97, such extra steps are required as forming an nitride film thoroughly and processing this nitride film into the spacer 95, thus resulting in a disadvantage of an increased number of steps required in manufacturing. Further, there also occur such a disadvantage that a bird""s beak 94A bites into the thick field oxide film and such another disadvantage that a photolithography process results in a small distance between a photo-resist film edge and a oxide film edge.
Next, by the semiconductor device manufacturing method disclosed in Japanese Laid-open Patent Application No. Hei 10-284477, as shown in FIGS. 9A to 9D, the nitride film 103 having the opening 103A therein is used as an oxidation preventing film commonly in both oxidation steps for formation of the first field oxide film 104 and the second field oxide film 106, so that as in the case of the prior art described with reference to FIGS. 6A to 6H, the first and second field oxide films 104 and 106 spread laterally by roughly the same width. Therefore, this method has a disadvantage that the bird""s beak of the first and second field oxide films inevitably bites deep into the element region 108. Further, it has a disadvantage that the bird""s beak bites deep into a thick field oxide film as well as another disadvantage that a photolithography process results in a small distance between a photo-resist film edge and an oxide film edge.
In view of the above, it is an object of the invention to provide a semiconductor device in which bite-in of a bird""s beak into an element region can be suppressed to flatten the surface of the element region when an element isolating region is formed using LOCOS in two steps and a method for manufacturing the same.
According to a first aspect of the present invention, there is provided a semiconductor device manufacturing method for selectively forming an element isolating region on a semiconductor substrate so that the semiconductor substrate may be dielectrically isolated into a plurality of element regions by the element isolating region, including:
a first oxidation preventing film forming step of covering an element-isolating region formation-expected region on the semiconductor substrate with a first oxidation preventing film having a first opening therein;
a first field oxide film forming step of performing first field oxidation on the semiconductor substrate to thereby selectively form a first field oxide film at such a position in the element-isolating region formation-expected region that is not covered with the first oxidation preventing film;
a second oxidation preventing film forming step of removing the first oxidation preventing film to then cover the first field oxide film with a second oxidation preventing film having a second opening having a set width dimension smaller than the first opening; and
a second field oxide film forming step of performing second field oxidation on the semiconductor substrate to thereby selectively form a second field oxide film which overlaps partially with the first field oxide film and also which is located deeper in level than the first field oxide film at such a position in the element-isolating region formation-expected region that corresponds to the second opening in the second oxidation preventing film.
In the foregoing first aspect, a preferable mode is one that wherein further including a recess forming step of using the first oxidation preventing film as a mask to thereby form a recess in the first element-isolating region formation-expected region between the first oxidation preventing film forming step and the first field oxide film forming step.
Also, a preferable mode is one wherein the recess can be changed in formation arbitrarily in width and depth.
According to a second aspect of the present invention, there is provided a semiconductor device manufacturing method for selectively forming a first element isolating region with a larger film thickness and a second element isolating region with a smaller film thickness on a semiconductor substrate so that the semiconductor substrate may be dielectrically isolated into a plurality of element regions by the first element isolating region and second element isolating region, including:
a first oxidation preventing film forming step of covering a first element-isolating region formation-expected region and a second element-isolating region formation-expected region on the semiconductor substrate with a first oxidation preventing film having a first opening therein in such a way that the first opening may be located above the first element-isolating region formation-expected region;
a first field oxide film forming step of performing first field oxidation on the semiconductor substrate to thereby selectively form a first field oxide film only at such a position in the first element-isolating region formation-expected region that is not covered with the first oxidation preventing film;
a second oxidation preventing film forming step of removing the first oxidation preventing film to then cover the semiconductor substrate with a second oxidation preventing film having a second opening and a third opening which have set width dimensions smaller than the first opening in such a way that the second opening may be located above the first field oxide film and also that the third opening may be located above the second element-isolating region formation-expected region; and
a second and third field oxide films forming step of performing second field oxidation on the semiconductor substrate to thereby selectively form a second field oxide film which overlaps partially with the first field oxide film and also which is located deeper in level than the first field oxide film only at such a position in the first element-isolating region formation-expected region that corresponds to the second opening in the second oxidation preventing film and, at the same time, selectively forms a third field oxide film only at such a position in the second element-isolating region formation-expected region that corresponds to the third opening.
According to a third aspect of the present invention, there is provided a semiconductor device manufacturing method for selectively forming an element isolating region on a semiconductor substrate so that the semiconductor substrate may be dielectrically isolated into a plurality of element regions by the element isolating region, including:
a first oxidation preventing film forming step of covering an element-isolating region formation-expected region on the semiconductor substrate with a first oxidation preventing film having a first opening therein;
a first field oxide film forming step of performing first field oxidation on the semiconductor substrate to thereby selectively form a first field oxide film at such a position in the element-isolating region formation-expected region that is not covered with the first oxidation preventing film;
a second oxidation preventing film forming step of removing the first oxidation preventing film to then cover the first field oxide film with a second oxidation preventing film having a second opening therein which has a set width dimension larger than the first opening; and
a second field oxide film forming step of performing second field oxidation on the semiconductor substrate to thereby selectively form a second field oxide film which overlaps partially with the first field oxide film and also which is located shallower in level than the first field oxide film at such a position in the element-isolating region formation-expected region that corresponds to the second opening in the second oxidation preventing film.
According to a fourth aspect of the present invention, there is provided a semiconductor device manufacturing method for selectively forming a first element isolating region with a larger film thickness and a second element isolating region with a smaller film thickness on a semiconductor substrate so that the semiconductor substrate may be dielectrically isolated into a plurality of element regions by the first element isolating region and second element isolating region, including:
a first oxidation preventing film forming step of covering a first element-isolating region formation-expected region and a second element-isolating region formation-expected region on the semiconductor substrate with a first oxidation preventing film having a first opening therein in such a way that the first opening may be located above the first element-isolating region formation-expected region;
a first field oxide film forming step of performing first field oxidation on the semiconductor substrate to thereby selectively form a first field oxide film only at such a position in the first element-isolating region formation-expected region that is not covered with the first oxidation preventing film;
a second oxidation preventing film forming step of removing the first oxidation preventing film to then cover the semiconductor substrate with a second oxidation preventing film having a second opening and a third opening which have set width dimensions larger than the first opening in such a way that the second opening may be located above the first field oxide film and also that the third opening may be located above the second element-isolating region formation-expected region; and
a second and third field oxide films forming step of performing second field oxidation on the semiconductor substrate to thereby selectively form a second field oxide film which overlaps partially with the first field oxide film and also which is located shallower in level than the first field oxide film only at such a position in the first element-isolating region formation-expected region that corresponds to the second opening in the second oxidation preventing film and, at the same time, selectively form a third field oxide film only at such a position in the second element-isolating region formation-expected region that corresponds to the third opening.
In the foregoing second aspect, a preferable mode is one that wherein further including another recess forming step of using the second oxidation preventing film as a mask to thereby form another recess in the second element-isolating region formation-expected region between the second oxidation preventing film forming step and the second and third field oxide films forming step.
Also, a preferable mode is one wherein the recess can be changed in formation arbitrarily in width and depth.
According to a fifth aspect of the present invention, there is provided a semiconductor device in which a semiconductor substrate thereof is dielectrically isolated into a plurality of element regions by an element isolating region which is selectively formed on the semiconductor substrate, wherein the element isolating region includes:
a first field oxide film which is selectively formed at such a position in an element-isolating region formation-expected region that is not covered with a first oxidation preventing film having a first opening therein; and
a second field oxide film which is selectively formed at such a position in the element-isolating region formation-expected region that is not covered with a second opening of a second oxidation preventing film having the second opening with a smaller width dimension than the first opening and also which is locally formed so as to be thicker at around a middle of the first field oxide film.
According to a sixth aspect of the present invention, there is provided a semiconductor device in which a first element isolating region with a larger film thickness and a second element isolating region with a smaller film thickness are selectively formed on a semiconductor substrate so that the semiconductor substrate may be dielectrically isolated into a plurality of element regions by the first element isolating region and second element isolating region, wherein:
the first element isolating region includes a first field oxide film which is selectively formed at such a position in a first element-isolating region formation-expected region that is not covered with a first oxidation preventing film having a first opening and a second field oxide film which is selectively formed at such a position in the first element-isolating region formation-expected region that is not covered with a second opening of a second oxidation preventing film having the second opening with a smaller width dimension than the first opening and also which is locally formed so as to be thicker at around a middle of the first field oxide film; and
the second element isolating region includes a third field oxide film which is selectively formed at such a position in a second element-isolating region formation-expected region that is not covered with the second oxidation preventing film having a third opening.
According to a seventh aspect of the present invention, there is provided a semiconductor device in which a semiconductor substrate thereof is dielectrically isolated into a plurality of element regions by an element isolating region which is selectively formed on the semiconductor substrate, wherein the element isolating region includes:
a first field oxide film which is selectively formed at such a position in an element-isolating region formation-expected region that is not covered with a first oxidation preventing film having a first opening therein; and
a second field oxide film which is selectively formed at such a position in the element-isolating region formation-expected region that is not covered with a second oxidation preventing film having therein a second opening with a larger width dimension than the first opening and which overlaps partially with the first field oxide film and also which is formed shallower in level than the first field oxide film.
Also, according to an eighth aspect of the present invention, there is provided a semiconductor device in which a first element isolating region with a larger film thickness and a second element isolating region with a smaller film thickness are selectively formed on a semiconductor substrate so that the semiconductor substrate may be dielectrically isolated into a plurality of element regions by the first element isolating region and second element isolating region, wherein:
the first element isolating region includes a first field oxide film which is selectively formed at such a position in a first element-isolating region formation-expected region that is not covered with a first oxidation preventing film having a first opening therein and a second field oxide film which is selectively formed at such a position in the first element-isolating region formation-expected region that is not covered with a second opening of the second oxidation preventing film having a second opening with a larger width dimension than the first opening; and
the second element isolating region includes a third field oxide film which is selectively formed at such a position in a second element-isolating region formation-expected region that is not covered with the second oxidation preventing film having a third opening.
With the above configurations drawn to the semiconductor device manufacturing method, on the substrate, an element-isolating region formation-expected region is masked by a first oxidation preventing film having a first opening therein in the first field oxidation to thereby form a first field oxide film, which is then masked by a second oxidation preventing film having a second opening therein having a set width dimension smaller than the first opening in the second field oxidation to thereby locally form a second field oxide film at around the middle of the first field oxide film, thus enabling arbitrarily controlling the film thickness of the element isolating region around the element region.
Also, with the above configurations drawn to the semiconductor device, a plurality of element regions is dielectrically isolated from each other by an element isolating region selectively formed on the silicon substrate, which element isolating region includes a first field oxide film which is selectively formed at a position not covered with a first oxidation preventing film having a first opening therein of an element-isolating region formation-expected region and a second field oxide film which is selectively formed at a position not covered with a second oxidation preventing film having a second opening therein with a smaller width dimension than the first opening of the element-isolating region formation-expected region and also which is locally formed so as to be thicker at around the middle of the first field oxide film, thus enabling formation the element isolating region having an arbitrary film thickness.
Thus, when the element isolating region is formed by LOCOS in two steps, the bird""s beak can be suppressed from biting deep into the element region, thus flattening the surface of that element region.